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 HIP5010, HIP5011
Data Sheet March 1996 File Number
4029.5
7V, 17A SynchroFETTM Complementary Drive Synchronous Half-Bridge
Designed with the P6 and Pentium(R) in mind, the Intersil SynchroFETTM family provides a new approach for implementing a synchronous rectified buck switching regulator. The SynchroFET replaces two power DMOSs, a Schottky diode, two gate drivers and synchronous control circuitry. The complementary drive circuit turns the upper FET on and the lower FET off when the input from the PWM is high. When the input from the PWM goes low the upper FET turns off and the lower FET turns on. The HIP5011 has a PWM pin that inverts the relationship from the input to PHASE. This architecture allows the designer to utilize a low cost single-ended PWM controller in either a current or voltage mode configuration. The SynchroFET operates in continuous conduction mode reducing EMI constraints and enabling high bandwidth operation. Several features ensure easy start-up. First, the supply currents stay below specification as the supply voltages ramp up; no unexpected surges occur that might perturb a soft-start or deplete a charge-pump. Second, any power-up sequence of the VCC, VIN , or PWM pins can be used without causing large currents. Third, the chip operates when VCC is greater than 2V so VCC can be created from a charge pump powered from VIN.
Features
* Complementary Drive, Half-Bridge Power NMOS * Use With Low-Cost Single-Output PWM Controllers * Improve Efficiency Over Conventional Buck Converter with Schottky Clamp * Minimum Deadtime Provided by Adaptive Shoot-Through Protection Eliminates External Schottky * Grounded Case for Low EMI and Simple Heatsinking * Low Operating Current * Frequency Exceeding 1MHz * Dual Polarity Input Options * All Pins Surge Protected
Applications
* 5V to 3.3V Synchronous Buck Converters * Pentium and P6 Power Supplies * PowerPCTM Power Supplies * Bus Terminations (BTL and GTL) * Drive 5V Motors Directly from Microprocessor
Pinouts
HIP5010IS1, HIP5011IS1 (SIP - VERTICAL) TOP VIEW
7 6 5 4 3 2 1 GND (TAB) PHASE VIN PWM (HIP5010), PWM (HIP5011) VCC VIN PHASE FRONT ROWS = PINS 1, 3, 5, 7 BACK ROWS = PINS 2, 4, 6
Ordering Information
PART NUMBER HIP5010IS HIP5010IS1 HIP5011IS HIP5011IS1 TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 7 Ld Gullwing SIP PKG. NO. Z7.05B
7 Ld Staggered Vertical SIP Z7.05C 7 Ld Gullwing SIP Z7.05B
7 Ld Staggered Vertical SIP Z7.05C
Typical Application Block Diagram
HIP5010IS, HIP5011IS (SIP - GULLWING) TOP VIEW
7 6 5 4 3 2 1 PHASE VIN PWM (HIP5010), PWM (HIP5011) VCC VIN PHASE PWM CONTROLLER PWM +12V +5V VCC VIN
GND (TAB)
+3.3V CONTROL PHASE
HIP5010 GND
SYNCHRONOUS RECTIFIED BUCK CONVERTER
Pentium(R) is a registered trademark of Intel Corporation. PowerPCTM is a trademark of International Business Machines. SynchroFETTM is a trademark of Intersil Corporation.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HIP5010, HIP5011 Non-Inverting SynchroFET Block Diagram
HIP5010
VCC DRIVER
VIN
BUFFER PWM VCC
ADAPTIVE SHOOT-THROUGH PROTECTION
PHASE
DRIVER GND
Inverting SynchroFET Block Diagram
HIP5011
VCC DRIVER VIN
BUFFER PWM VCC
ADAPTIVE SHOOT-THROUGH PROTECTION
PHASE
DRIVER GND
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HIP5010, HIP5011
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16V Input Voltage VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V IPHASE, IVIN, IGND (TJ = 25oC) . . . . . . . . . . . 17A (Repetitive Peak) IPHASE, IVIN, IGND (TJ = 150oC) . . . . . . . . . . 15A (Repetitive Peak) PWM Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -4V to +16V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 3 (4kV) Lead Temperature (Soldering 10s) (Lead Tips Only). . . . . . . 300oC Storage Temperature Range . . . . . . . . . . . . . . . . . . -65oC to 150oC Junction Temperature Range . . . . . . . . . . . . . . . . . . -40oC to 150oC
Thermal Information (Typical)
Package SOIC (IB) . . . SIP (IS). . . . . SIP (IS1). . . . JC (oC/W) 26 2 2 0 63 55 1 45 30 JA (oC/W) 2 3 42 25 41 24 3 35 18 -
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V, 20% Input Voltage VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5.5V Supply Voltage, VCC, minimum for charge-pumped start-up . +4.0V
Versus additional square inches of 1 ounce copper on the printed circuit board. JC is measured to pin 12 for the SOIC. Printed circuit board had 1 square inch of copper. For SIP Packages value shown is typical with an infinite heat sink. 200 linear feet per minute of air flow. IPHASE .SIPs:11.5A(RMS), 11.2A(DC); SOIC:7.4A(RMS), 7.4A(DC) IVIN . . . SIPs:10.0A(RMS), 8.5A(DC); SOIC:6.4A(RMS), 6.4A(DC) IGND . . . . .SIPs:8.5A(RMS), 6.0A(DC); SOIC:5.4A(RMS), 5.4A(DC)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the recommended operating conditions of this specification is not implied.
Electrical Specifications
TJ = 25oC PARAMETERS rDS(ON) Upper MOSFET rDS(ON) Lower MOSFET VIN Operating Current VIN Quiescent Current VCC Operating Current VCC Quiescent Current (HIP5010) VCC Quiescent Current (HIP5010) VCC Quiescent Current (HIP5011) VCC Quiescent Current (HIP5011) Low Level PWM Input Voltage High Level PWM Input Voltage PWM Input Voltage Hysteresis Input Pulldown Resistance (HIP5010) Input Pullup Resistance (HIP5011) SYMBOL RDSU RDSL IVINO IVIN ICCO ICCIH ICCIL ICCNIH ICCNIL VIL VIH VIHYS RPWM RPWM TEST CONDITIONS VCC = 12V, VIN = 5V VCC = 12V, VIN = 5V VIN = 5V, No Load, 500kHz PWM or PWM = VCC or GND VCC = 12V, 500kHz PWM = VCC PWM = GND PWM = VCC PWM = GND MIN TYP 34 36 5 0.1 8 80 0.1 0.1 140 1.8 2.1 0.3 220 220 MAX 39 42 8 10 12 10 10 TJ = - 40oC TJ = 150oC MIN 1 100 100 MAX 65 68 10 100 15 400 100 100 400 3 400 400 UNITS m m mA A mA A A A A V V V k k
Switching Specifications
TJ = 25oC PARAMETERS Upper Device Turn-Off Delay Lower Device Turn-Off Delay Dead Time Phase Rise-Time Phase Fall-Time SYMBOL tPHL tPLH tDT tr tf TEST CONDITIONS VCC = 12V, IPHASE = -1A VCC = 12V, IPHASE = +1A VCC = +12V, IPHASE = -1A VCC = 12V, IPHASE = -1A VCC = 12V, IPHASE = +1A MIN TYP 30 30 10 20 20 MAX 50 50 TJ = - 40oC TJ = 150oC MIN MAX 80 80 UNITS ns ns ns ns ns
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HIP5010, HIP5011 Pin Descriptions
SYMBOL VCC VIN PHASE PWM (HIP5010) PWM (HIP5011) GND DESCRIPTION Positive supply to control logic and gate drivers. De-couple this pin to GND. FET Switch Input Voltage. De-couple this pin to GND. Tie all VIN terminals together. Output. Tie all phase terminals together. Single Ended Control Input. This input connects to the PWM controller output. System Ground.
Timing Diagram
12V PWM (HIP5010) 2V 0V 12V PWM (HIP5011)
2V 0V 5V 4.5V
tPHL tPLH
PHASE
2.5V
0.5V 0V -0.5V tf tDT tr
NOTE: IPHASE = +1A for tPLH and tf , IPHASE = -1A for tPHL, tDT, and tr . FIGURE 1.
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HIP5010, HIP5011 Typical Performance Curves
20 18 16 14 ICCO (mA) 12 10 8 6 4 2 0 0 100 200 300 400 500 600 700 800 900 1000 IVINO (mA) 6.0 5.5 5.0 4.5 3.5 3.0 2.5 2.0 1.5 1.0 0 0 100 200 300 400 500 600 700 800 900 1000
FREQUENCY (kHz)
FREQUENCY (kHz)
FIGURE 2. ICCO vs FREQUENCY
FIGURE 3. IVINO vs FREQUENCY
120 110 100 90 rDSU (m) rDSL (m) 80 70 60 50 40 30 20 4 5 6 7 8 9 10 VCC (V) 11 12 13 14 15 16 VIN = 3.3V VIN = 5V
120 110 100 90 80 70 60 50 40 30 20 4 5 6 7 8 9 10 VCC (V) 11 12 13 14 15 16 VIN = 5V AND 3.3V
FIGURE 4. RDSU vs VCC
FIGURE 5. RDSL vs VCC
1.8 1.7 RDSU OR RDSL (NORMALIZED) 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -40 -20 0 20 40 60 80 TEMPERATURE (oC) 100 120 140
FIGURE 6. RDSU OR RDSL vs TEMPERATURE
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HIP5010, HIP5011
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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